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Oppurtunity for Physical Design - CAD At QUALCOMM

Posted November 23, 2011 · 1 - 5 Years

Organization

QUALCOMM CDMA Technologies (QCT) is the largest provider of 3G chipset and software technology in the world, with chipsets shipped to more than 50 customers and powering the majority of all 3G devices commercially available. QCT partners with nearly 60 3G network operators around the globe and has the largest CDMA engineering team in the wireless industry.

QCT provides complete chipset solutions and integrated applications from the Launchpad suite of advanced technologies. Our integrated solutions offer device manufacturers reduced bill-of-materials costs, time-to-market, and development time. Mobile handsets powered by QCT chipsets can offer more features while maintaining a smaller, sleeker form-factor and benefiting from reduced power demands.

QCT values collaboration with its customers and partners and works closely with them to enable their success. We offer a wide range of tools to support the device development process, and develop new technologies based on the needs and demands of the wireless market. Devices for all market segments can now include features enabled by 3G wireless technology, in demand by a growing and increasingly sophisticated wireless community.

Role

Designation     Physical Design - CAD - Methodology & Automation Engineer

Job Description     

The candidate will be responsible for developing and maintaining methodology/tools that will automate the physical design
flow to improve PD turnaround time , QOR and efficiency of deliverables.

Desired Profile     

    3-5 years of experience working within Physical Design (PD) CAD Methodology for a leading semiconductor company is
required.

    Must have strong scripting skills - PERL/TCL.

    Strong Place and Route (PNR) tools knowledge is required: Magma, icc, Olympus.

    Experience using Primetime is required.

    Working knowledge of Timing Closure methodology, Power reduction, Clock Tree optimization will be desired.

 
Experience     1 - 5 Years

Industry Type     Semiconductors/ Electronics

Role     Hardware Design Engnr

Functional Area     IT-Support, Telecom, Hardware

Education     UG - B.Tech/B.E. - Electrical, Electronics/Telecomunication

PG - M.Tech - Electrical, Electronics/Telecomunication

Location     Bengaluru/Bangalore

Keywords     Timing closure methodology, Power reduction, clock tree optimization, PD methodology, Physical Design,
Methodology development, PNR, Place and Route, magma, icc, olympus, primetime, PERL / TCL

Contact    

Website     http://www.qualcomm.com

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